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Introduction

It is obvious that dynamo is an electrical machine which converts either mechanical energy into electrical energy or electrical energy into mechanical energy. When it converts electrical energy into mechanical energy it is called a motor, and when it converts mechanical energy into electrical energy it is called a generator. In either case it is a converter of energy and not a producer of it.

The generator is usually driven by an electric motor, or a diesel engine or steam engine or steam turbine, which are called as prime movers. Thus, the generator converts mechanical energy stored in the rotation of these prime movers into electrical energy.


Definition

The electric machine which converts mechanical energy into electrical energy is called generator. The machine is driven mechanically by a prime-mover such as steam engine, diesel engine or water turbines etc.


Working Principle

A generator works on the principle of the production of dynamically induced emf. Whenever a conductor moving in a magnetic field cuts the lines of conductor moving in a magnetic field cuts the lines of force, dynamically induced emf is produced in it according to Faraday 's laws of electro- magnetic induction. This induced emf causes a current to flow if the conductor circuit is closed. The quicker the movement, the larger is the induced emf.

A generator consists of a large number of copper conductors and a strong magnetic field. The conductors are arranged in a system, called the armature, that they form a circuit. The armature rotates in the stationary magnetic field. When the conductor circuit is closed, a direct current flows in the circuit.


Simple DC Generator

Consider a rectangular conductor coil rotating about its axis in a magnetic field. The two ends of the coil are connected by a slipring which is split in two halves. It constitutes a slipring commutator, which rotates with the coil. Carbon brushes slip on each half of the ring through which the current is taken out and circuit is completed through a resistance. As in the case of alternator, when the coil rotates it cuts the magnetic lines of force and according to Faraday's laws of electro-magnetic induction an emf is induced in the coil. This emf causes a current to flow in the conductor when the circuit is closed. But this current is alternating. It flows first in one direction and then in the reverse direction. Also its magnitude is not constant while flowing in any one direction. But the commutator in d.c. generator makes the flow of current unidirectional in the external circuit.

In the first half revolution, the current flows along, brush No. 1 which is in contact with segment 'a' acts as positive end of the supply. and brush No. 2 which is in contact with segment 'b' acts as negative end. In the next half revolution, the direction of the current in the coil is reversed. But at the same time the position or segment (a) and (b) are also reversed. The current flows along, brush No. 1 still acts as positive end of the supply, and the current in the load resistance flows in the same direction from L and M.


A waveform of the current through the external circuit. This current is unidirectional, but not continuous (having the same magnitude) like pure direct current. Its magnitude rises from zero to maximum and again to zero for each 180° of rotation. If there are two coils mutually perpendicular to each other, and commutator is in four parts; then the resultant current would be very nearly constant. The periodic variation which still remain may be further reduced by increasing the number of coils.


Types of D.C. Generator

DC generators are of two types:

(1) Self excited DC generator

(2) Seperately excited DC generator


Self Excited DC Generators are of three types:

(a) Shunt Generator

(b) Series Generator

(c) Compound Generator

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MOSFET (OR MOS) OR IGFET

The 'Metal oxide semiconductor field effect transistor (MOSFET or simply MOS) is another important category of field effect transistors. In many applications, JFET is being replaced by MOSFET due to favourable characteristics of the latter.

The MOS may be of two types:

1. n-channel MOS or n-mos

2. p-channel MOS or p-mos

According to the mode of operation, they can be depletion and enhancement types.


1. Construction of n-channel MOS:

The n-MOS consists of a lightly doped p-type 'substrate' over which two highly doped n regions are diffused. These n regions act as source and drain and are separated by about 10-20µm. A thin layer of an insulating material (silicon dioxide, SiO2) is grown over surface of the structure and holes are cut into the oxide layer to make contact with source and drain. After this the 'gate (of aluminium) is overlaid on silicon oxide layer. Covering the entire channel region, simultaneously similar metal contacts are made with the drain and source.

The metal area of the gate, in conjunction with the insulating dielectric SiO2, layer and semiconductor channel forms a parallel plate capacitor. Due to presence of insulating layer of SiO2, u device is also known as "lnsulated gate field effect transistor (IGFET). The SiO2, layer gives the device extremely high input impedance which maintains its superiority over JFET.


2. Construction of p-channel MOS:

The construction of p-MOS is more or less same as n-MOS. The p-MOS has an n-type substrate and p-type regions for drain and source.


Note

(a) "Substrate' is the foundation on which the device is constructed. However, in some cases the substrate is internally connected to the 'source' terminal and additional terminal is taken out from the substrate (SS) making the device as a '4-terminal device'.

(b) There is no direct electrical connection between GATE and the channel of MOSFET.

(c)The device is called "metal oxide semiconductor FET" because of the following reasons:

  • The word 'metal' is used for aluminium of which the gate is made.
  • The word 'oxide' is used for 'silicon oxide' which plays an important role in the operation of the device.
  • The word 'semiconductor is used for the basic structure (substrate) on which n and p-regions are diffused.

(d) The source and the drain are 1 mil (=25 µm) apart.

(e) Thickness of SiO2, layer is 1000-2000 Ã… (1 Ã… = 10-10 m) and the chip area of the MOS is 5 square mil. This is only 5% of the area required for a bipolar transistor.


MODES OF OPERATION OF THE MOS

The gate of a MOS can be given a negative as well as positive voltage. Therefore, channel MOS and p-channel MOS both can be made to operate in two modes:

1. depletion MOS

2. enhancement MOS.

1. Depletion MOS

(a) In a depletion MOS (n-channel) on making the gate voltage negative, positive charges get induced in the n-channel through the SiO2, layer. These positive charges make the n-channel less conductive. The drain current reduces, as VGS is made more and more negative. This new distribution of charges in the channel results in the depletion (removal) of majority carriers is the reason that the device is known as a depletion MOS. The phenomenon is analogous to the pinch off' in the JFET. In other words in a depletion MOS the drain current decreases on application of a negative gate voltage.

(b) In a p-channel depletion MOS, positive voltage will be given at the gate and reverse of the phenomenon described above will take place.

2. Enhancement MOS

(a) On applying negative voltage at the gate of p-channel enhancement MOS, positive charges get correction induced in the p-channel through the SiO2 layer. These charges make the p-channel more conductive and the drain current increases as the Vos gets more and more negative. This new distribution in the channel results in the enhancement (increase) of the majority carriers. This is the reason that the device is known as an enhancement MOS. In other words, in an enhancement MOS, the drain current increases on application of a negative gate voltage.

(b) In n-channel enhancement MOS, positive voltage will be given at the gate and reverse of the above phenomenon will take place.

n-MOS vs p-MoS

1. The p-channel enhancement MOS is easier to fabricate than the n-channel MOS.

2. In MOS, the main contamination is due to positive ions trapped in SiO2, layer between gate and the substrate. In n-enhancement MOS the gate is usually kept positive with respect to the substrate. Hence, these positive ions make the device ON prematurely, whereas in p-enhancement MOS, these do not have any effect as the gate is usually kept negative with respect to the substrate.

3. The switching speed of n-MOS is higher than that of p-MOS. The switching speed is dependent on the RC constant of the internal capacitance (at the gate) of the device.

4. Though n-MOS is a bit superior, its fabrication demands rigorous process control and is, therefore, costly. This is the reason that p-MOS is more popular.

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So far we have studied ordinary transistors which are also called Bipolar Junction Transistors (BJT). But a BJT is noisy in operation and has low input impedance. Due to these two factors BJTs are replaced by the new type of transistors called field effect transistors (FETS), which have been proved to be very efficient device especially in I.C. form.

A FET is a three-terminal, unipolar semiconductor device in which current conduction takes place due to an electric field applied at its input.


CLASSIFICATION OF FET

FETs may be put into two major categories.

1. Junction field effect transistors. JFET or simply FET)

The FETs may be an N-type or a P-type.

2. Insulated gate field effect transistors (IGFET)

The IGFET are also called 'metal oxide semiconductor field effect transistors' (MOSFET or simply MOS).

The MOSFETS are again of two types:

(a) Enhancement MOSFET

(b) Depletion MOSFET

The ordinary FET is sometimes also known as JFET (Junction Field Effect Transistor).


CONSTRUCTION OF A JFET/FET

The JFET (or FET) is a three terminal device, with one terminal capable of controlling the current between the other two. An FET is essentially N-type or P-type silicon bar containing two PN junction diodes on its sides.


Accordingly, the FET may be:

1. N-channel FET: When the bar is of N-type silicon material, such a FET is called N-channel FET.

2. P-channel FET: When the bar is of P-type silicon material, such a FET is called P-channel FET.

Terminals: The three terminals of an FET are

(a) Gate (G) :The two P-N junctions forming diodes are connected together internally and it forms a common terminal called "Gate" (G).

(b) Source (S) : The bottom of the channel is connected through an ohmic contact to a terminal called "Source" (S).

(c)Drain (D): The top of the channel is connected through an ohmic contact to a terminal called "Drain" (D).


BIASING OF FET

Usually a biasing voltage (VDS) is applied between Source (S) and Drain (D). Thus the source is at greater negative potential with respect to the drain so that electrons (electric current) move from S to D. However, if the drain is kept at higher negative potential with respect to source, electrons will move from drain to source because S and D are interchangeable.

A reverse bias (VGS) is applied at the gate (G) with respect to the source (S). (VGS) is the electric field which controls the amount of electrons (current from S to D or D to S).


OPERATION OF N-JFET

The basic working principle of an FET is the field effect'. Its operation depend upon the electric field applied at its input GATE terminal (G). It will be easy to understand this with an example:

We are familiar with ability of a magnet to pull (attract) metal fillings without any physical contact between magnet and the fillings. The "magnetic field of the magnet attracts them through magnetic lines of force as short as possible. Similarly, in case of a FET, an electric field is established by the charges present, that will control the conduction path of the output circuit without any direct contact between controlling and the controlled quantities.


The operation of the circuit can be explained in following steps.

(a)When a voltage VDS is applied between drain and source and no voltage is applied on the gate (switch is open), the P-N junctions on the sides will produce depletion layers and, as S is at higher negative potential with respect to D, the electrons will move from S to D. The number of electrons (i.e., current) from S to D will depend upon the width of passage between the two depletion layers. If the depletion layers are narrow, the passage between them will be more and hence the current will be more.

(b) If the switch of VGS is closed, a reverse bias is applied on the gate (G). (Recall that G is the common terminal of both P-N junctions). This reverse bias will increase width of depletion layers. This will reduce the passage between the layers and now less number of electrons (i.e., current) can pass through from S to D.

It may be noted that gate is the controlling terminal for the current flow from source to drain. In other words, the current can be controlled by the electric field (VGS) applied on the gate of a FET. This justifies name field effect transistor (FET) for the device.


OPERATION OF P-JFET

A P-FET works in the same manner as described for an N-FET. Moreover, the conduction will be through holes and not through electrons.


IMPORTANT POINTS ABOUT FET 

1. A FET is a 'solid equivalent" of vaccum triode. Just as the grid carries very small current and grid voltage controls the operation of the tube, similarly the gate in an FET takes very small current and gate voltage (VGS) controls the FET operation. Thus, a vaccum triode and a FET both are voltage driven devices.

2. From the above discussion we can conclude that a FET has combination of properties or vaccum tube as well as of transistor.

3. In a bipolar transistor, the current is to pass through two junctions and, therefore, the operation becomes noisy. In a FET, there is no junction in the passage of the current from S to D, hence operation of FET is almost noise free.

4. Due to high input impedance an FET provides a high degree of isolation between input and output circuits. This property is useful for its use as buffer amplifier.

5. The FET also produces a phase reversal of 180° between input and output as a transistor.

6. The FET may be used in any of the following three configurations (as in the case of transistors):

(a) Common source configuration

(b) Common drain configuration

(c)Common gate configuration

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