MOSFET (OR MOS) OR IGFET
The 'Metal oxide semiconductor field effect transistor (MOSFET or simply MOS) is another important category of field effect transistors. In many applications, JFET is being replaced by MOSFET due to favourable characteristics of the latter.
The MOS may be of two types:
1. n-channel MOS or n-mos
2. p-channel MOS or p-mos
According to the mode of operation, they can be depletion and enhancement types.
1. Construction of n-channel MOS:
The n-MOS consists of a lightly doped p-type 'substrate' over which two highly doped n regions are diffused. These n regions act as source and drain and are separated by about 10-20µm. A thin layer of an insulating material (silicon dioxide, SiO2) is grown over surface of the structure and holes are cut into the oxide layer to make contact with source and drain. After this the 'gate (of aluminium) is overlaid on silicon oxide layer. Covering the entire channel region, simultaneously similar metal contacts are made with the drain and source.
The metal area of the gate, in conjunction with the insulating dielectric SiO2, layer and semiconductor channel forms a parallel plate capacitor. Due to presence of insulating layer of SiO2, u device is also known as "lnsulated gate field effect transistor (IGFET). The SiO2, layer gives the device extremely high input impedance which maintains its superiority over JFET.
2. Construction of p-channel MOS:
The construction of p-MOS is more or less same as n-MOS. The p-MOS has an n-type substrate and p-type regions for drain and source.
Note
(a) "Substrate' is the foundation on which the device is constructed. However, in some cases the substrate is internally connected to the 'source' terminal and additional terminal is taken out from the substrate (SS) making the device as a '4-terminal device'.
(b) There is no direct electrical connection between GATE and the channel of MOSFET.
(c)The device is called "metal oxide semiconductor FET" because of the following reasons:
- The word 'metal' is used for aluminium of which the gate is made.
- The word 'oxide' is used for 'silicon oxide' which plays an important role in the operation of the device.
- The word 'semiconductor is used for the basic structure (substrate) on which n and p-regions are diffused.
(d) The source and the drain are 1 mil (=25 µm) apart.
(e) Thickness of SiO2, layer is 1000-2000 Å (1 Å = 10-10 m) and the chip area of the MOS is 5 square mil. This is only 5% of the area required for a bipolar transistor.
MODES OF OPERATION OF THE MOS
The gate of a MOS can be given a negative as well as positive voltage. Therefore, channel MOS and p-channel MOS both can be made to operate in two modes:
1. depletion MOS
2. enhancement MOS.
1. Depletion MOS
(a) In a depletion MOS (n-channel) on making the gate voltage negative, positive charges get induced in the n-channel through the SiO2, layer. These positive charges make the n-channel less conductive. The drain current reduces, as VGS is made more and more negative. This new distribution of charges in the channel results in the depletion (removal) of majority carriers is the reason that the device is known as a depletion MOS. The phenomenon is analogous to the pinch off' in the JFET. In other words in a depletion MOS the drain current decreases on application of a negative gate voltage.
(b) In a p-channel depletion MOS, positive voltage will be given at the gate and reverse of the phenomenon described above will take place.
2. Enhancement MOS
(a) On applying negative voltage at the gate of p-channel enhancement MOS, positive charges get correction induced in the p-channel through the SiO2 layer. These charges make the p-channel more conductive and the drain current increases as the Vos gets more and more negative. This new distribution in the channel results in the enhancement (increase) of the majority carriers. This is the reason that the device is known as an enhancement MOS. In other words, in an enhancement MOS, the drain current increases on application of a negative gate voltage.
(b) In n-channel enhancement MOS, positive voltage will be given at the gate and reverse of the above phenomenon will take place.
n-MOS vs p-MoS
1. The p-channel enhancement MOS is easier to fabricate than the n-channel MOS.
2. In MOS, the main contamination is due to positive ions trapped in SiO2, layer between gate and the substrate. In n-enhancement MOS the gate is usually kept positive with respect to the substrate. Hence, these positive ions make the device ON prematurely, whereas in p-enhancement MOS, these do not have any effect as the gate is usually kept negative with respect to the substrate.
3. The switching speed of n-MOS is higher than that of p-MOS. The switching speed is dependent on the RC constant of the internal capacitance (at the gate) of the device.
4. Though n-MOS is a bit superior, its fabrication demands rigorous process control and is, therefore, costly. This is the reason that p-MOS is more popular.
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